Graphical test pattern generator for non-scan devices clusters

ScantracerIIScanTracer test pattern development and debug software combines the ease of graphical programming, the speed of the ScanMaster Controller card, and the power of ScanNavigator Integrated Development Environment to get you the best possible test coverage in the shortest possible time.

ScanTracer is ideal for generating tests of non-scan device clusters that share leads with JTAG compliant devices. You simply identify and map the signals, device leads or net names you wish to include in the test, then start creating test patterns for the DUT (device under test). The test patterns can be defined, and later edited, at the bit level, bus level or burst level. As an efficiency feature, ScanTracer allows you to save patterns defined in a test so you can reapplied them, or an edited version of them, in another test.

Additionally, ScanTracer supports import of Teradyne’s LASAR and third party simulation vectors for the reuse of existing simulation and test patterns.

Cluster tests generated in ScanTracer can be run from the ScanTracer GUI in burst or single step mode, or executed as part of a larger ScanNavigator sequence. Patterns where observed response data differs from expected response data are clearly displayed in the GUI to assist in test debug.
  • Easy to view waveform-style display
  • Signal/buses displayed as device-pin, net name, or signal name
  • Specify logic states at the single bit or bused signal level
  • Pattern generation macros
  • Patterns can be called directly from VCCT test generation sequence
  • Import/export PFB formatted vectors
  • Execute in burst or single step mode
  • User-customizable display
  • Fully integrated into ScanNavigator™ Development and RunTime Environment
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