How To Increase In-Circuit Test Coverage Of A Board With Limited Accessibility
One of the main objectives of an in-circuit test program is to achieve the highest test coverage – preferably close to 100%. However, in many cases, the lack of test access impacts a board’s test coverage. The main reason being that board was designed with little or no consideration for test (design for test – DFT). So, this can present problems down the line. The manufacturing stage is the least costly place to detect and repair a defective circuit assembly that has just been produced. However, in order to be able to identify a defective board and pinpoint its issue(s), a reliable and high coverage in-circuit test program would be needed. But, this might not be possible with a board with poor test accessibility. As a result, defective boards could be released to subsequent production steps, where it is more costly and time consuming to identify any problems. It is possible to avert this scenario to a large extent if the in-circuit test coverage of a board with low accessibility is increased. For one of our recent projects we were required to develop a test program for a board with only 29% test accessibility. Using the HP 3070 in-circuit test platform, equipped with Cover-Extend Technology (provides test coverage without test access) and Silicon Nail (allows users to test non-boundary scan devices by using devices which are boundary scan-enabled to act as drivers/receivers. The direct result of this is that no physical test access or test nails are now required. Instead the drivers/receivers now act like silicon-based test nails), we were able to gain a vast improvement in test coverage.