Coverage Optimization support for JTag Tech and Corelis

Acculogic announces support for Test Coverage Optimization between the flagship FLS980 Flying Probe Test System and boundary scan tool vendors JTag Technologies and Corelis. The key advantage here is that we can leverage boundary scan coverage and reduce test time and limit the number of contacts during the execution of a flying probe test sequence.
Acculogic Software tools consume the boundary scan vendors test coverage report and then automatically disables the duplicate flying probe based tests. On a large PCBA, often you can find thousands of duplicate test steps, and this has proven to reduce test times dramatically. One board design with more than 130 minute run time, was reduced to just over 22 minutes using this technique. While these results are astounding, it is more often that the reductions are in the range of 25-50% overall test time savings. Often Test Engineers have Boundary Scan Test vectors provided from OEMs or from other sources so that it becomes important to deal with many different Boundary Scan Tool Vendors coverage files. This is exactly what we do!
One specific area related to Boundary Scan failure analysis can also be improved using this combined approach. Boundary Scan is very good at isolating faults to the NET Level, once the net based fault is isolated, the Flying Probe can be used to isolate which pin on the NET is the real failure and where the real repair should take place.